Senior Staff Engineer, Tenstorrent

CPU, Front-End Verification

Salary not provided

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets

C++

Branch

Mid and Senior level

Austin

San Francisco Bay Area

Next-generation computing company building computers for AI

Be an early applicant

Next-generation computing company building computers for AI

1001+ employees

B2BArtificial IntelligenceEnterpriseManufacturingDeep TechMachine Learning

Be an early applicant

Salary not provided

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets

C++

Branch

Mid and Senior level

Austin

San Francisco Bay Area

1001+ employees

B2BArtificial IntelligenceEnterpriseManufacturingDeep TechMachine Learning

Company mission

To bring unique solutions to the problems facing AI and machine learning.

Job

Company

Role

Who you are

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting
Unit-Level Verification: Work within the front-end DV team to build and maintain UVM testbenches for instruction fetch units, branch predictors, and related sub-blocks
Stimulus Generation: Develop constrained-random and directed tests targeting speculation depth, misprediction/redirect flows, fetch bubbles, and cache/TLB interactions
C++ Integration: Help develop and maintain C++ reference models and predictors that integrate into the verification framework for cycle-accurate or transaction-level checking
Execution & Closure: Execute verification plans, track functional and code coverage metrics, and ensure edge cases are verified
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology

What the job involves

We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios
Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++
Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking
Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels
Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs
What You Will Learn:
RISC-V Front-End Microarchitecture: Practical experience with high-performance RISC-V fetch pipelines and prediction structures
Maintainable DV Infrastructure: Strategies for writing unit testbenches that remain manageable as designs evolve
Tooling & Workflows: Experience using both industry-standard simulators and open-source flows (e.g., Verilator) across simulation and emulation environments
Cross-Team Collaboration: Working directly with RTL, performance modeling, and software teams to deliver reliable hardware

Our take

Tenstorrent is a US- and Canada-based semiconductor startup specializing in processors for AI workloads. Rather than building gneral-purpose CPUs or GPus, the company develops custom chips and sofrware optimized for running moder AI models. As demand for AI accelerates, and as a global chip shortage reshapes the semiconductor industry, these trends have become strong tailwinds for Tenstorrent.

The company’s unique approach is to build for this future software, which it believes will be written at a higher level. Combining this with conditional computing, Tenstorrent supports a scalable distributed network approach that is analogous to a human brain.

While the market for specialized AI hardware is destined to be gigantic, the company has to compete with a plethora of hopeful startups (as well as major tech companies like NVIDIA and Qualcomm). That said, Tenstorrent boasts an excellent trajectory so far, with its latest moves including unveiling its high-end Wormhole AI processors, and a partnership with LG which will see the development of chips for "Affectionate Intelligence".

Kirsty

Company Specialist at Welcome to the Jungle

Insights

Top investors

52% employee growth in 12 months

Glassdoor (3.5)

Company

Funding (last 2 of 7 rounds)

Dec 2024

$693m

SERIES D

Jun 2024

$300m

LATE VC

Total funding: $1.3bn

Company HQ

Flemingdon Park, Toronto, ON

Leadership

Jim Keller

(CEO)

Previously Senior VP of Silicon Engineering at Intel Corporation, VP of Autopilot Hardware Engineering at Tesla, Corporate VP and Chief Architect at AMD, and VP of Engineering at Apple.

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