Machine Learning Intern, d-Matrix
$30.00 – $50.00 per hour
3 days a week in office (Santa Clara, CA)
AI computing and efficiency software
Posted today
AI computing and efficiency software
21-100 employees
Posted today
$30.00 – $50.00 per hour
3 days a week in office (Santa Clara, CA)
21-100 employees
Company mission
To deliver best-in-class economics for AI inference acceleration in the datacenter.
Role
Who you are
- Currently pursuing a degree in Computer Science, Electrical Engineering, Machine Learning, or a related field
- Familiarity with PyTorch and deep learning concepts, particularly regarding model optimization and memory management
- Understanding of CUDA programming and hardware-accelerated computation (experience with CUDA is a plus)
- Strong programming skills in Python, with experience in PyTorch
- Analytical mindset with the ability to approach problems creatively
- This role is ideal for a self-motivated intern interested in applying advanced memory management techniques in the context of large-scale machine learning inference. If you’re passionate about optimizing machine learning models and are excited to explore cutting-edge solutions in model inference, we encourage you to apply
Desirable
- Experience with deep learning model inference optimization
- Knowledge of data structures used in machine learning for memory and compute efficiency
- Experience with hardware-specific optimization, especially on custom hardware like D-Matrix, is an advantage
What the job involves
- We are seeking a motivated and innovative Machine Learning Intern to join our team
- The intern will work on developing a dynamic Key-Value (KV) cache solution for Large Language Model (LLM) inference, aimed at enhancing memory utilization and execution efficiency on D-Matrix hardware
- This project will involve modeling at the PyTorch graph level to enable efficient, torch-native support for KV-Cache, addressing limitations in current solutions
- Research and analyze existing KV-Cache implementations used in LLM inference, particularly those utilizing lists of past-key-values PyTorch tensors
- Investigate “Paged Attention” mechanisms that leverage dedicated CUDA data structures to optimize memory for variable sequence lengths
- Design and implement a torch-native dynamic KV-Cache model that can be integrated seamlessly within PyTorch
- Model KV-Cache behavior within the PyTorch compute graph to improve compatibility with torch.compile and facilitate the export of the compute graph
- Conduct experiments to evaluate memory utilization and inference efficiency on D-Matrix hardware
- Develop an efficient support system for KV-Cache on D-Matrix hardware
- Create a torch-level modeling framework for dynamic KV-Cache
- Ensure compatibility of the KV-Cache model with torch.compile and other PyTorch features for optimized graph export
Our take
The explosion in the field of AI puts significant strain on traditional computers, and the silicon architectures currently in use are a bottleneck on the speed and effectiveness of emerging AI models. d-Matrix aims to tackle this challenge by with its digital in-memory computing accelerator for AI. Using a combination of machine learning software tools and modular chiplets it delivers a huge increase in AI computing efficiency without a corresponding increase in energy use.
D-Matrix has major competitors in the race to deliver the next generation of scalable AI solutions. These include the likes of Nvidea which is developing GPU architecture that runs at ten times the efficiency of existing models. However the flexibility and easy scalability of d-Matrix's solution helps it stand out, and its novel approach has gained a high degree of support from investors. The company is currently expanding its operations in the US, India and Australia, and is well poised for success as demand for AI compute solutions continues to grow exponentially.
Freddie
Company Specialist at Welcome to the Jungle
Company
Funding (2 rounds)
Sep 2023
$110m
SERIES B
Apr 2022
$44m
SERIES A
Total funding: $154m
Company HQ
Santa Clara, CA
Leadership
Sid Sheth
(CEO)Previously Director at NetLogic Microsystems, Director of Marketing at Broadcom Inc and SVP/GM atInphi Corporation.
Sudeep Bhoja
(CTO)Previously CTO at Inphi Corporation, Technical Director at Broadcom and Chief Architect at Big Bear Networks.
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