Senior Firmware Engineer, Astera Labs

PCIe/CXL Memory Solutions

$147-230k

Your base salary will be determined based on your relevant experience and the pay of employees in similar positions

Senior and Expert level

San Francisco Bay Area

Purpose-built connectivity solutions

Be an early applicant

Purpose-built connectivity solutions

501-1000 employees

B2BArtificial IntelligenceData storageEnterpriseMachine Learning

Be an early applicant

$147-230k

Your base salary will be determined based on your relevant experience and the pay of employees in similar positions

Senior and Expert level

San Francisco Bay Area

501-1000 employees

B2BArtificial IntelligenceData storageEnterpriseMachine Learning

Company mission

To be a trusted partner for distributing data in intelligent systems.

Job

Company

Role

Who you are

Bachelor’s degree in Electrical Engineering, Computer Science, or a related technical field
5+ years of hands-on experience in embedded firmware development using C
Deep expertise in low-level firmware for hardware bring-up, traffic enablement, and RAS (Reliability, Availability, Serviceability) feature implementation
Proven track record working with high-speed interfaces and protocols such as PCIe, CXL, DDR, and I2C
Hands on experience in CPU to Device, Device to Device flows like MMIO, DMA, PCIe P2P

What the job involves

Astera Labs is seeking experienced Senior Firmware Engineer PCIe/CXL Memory Solution to lead the design and development of embedded firmware for cutting-edge PCIe/CXL memory expansion products tailored for AI and Cloud infrastructure. This role is pivotal in enabling next-generation memory devices that power high-performance computing platforms. This position will be required onsite
Firmware development, bring-up, and validation of PCIe/CXL/DDR interfaces at PHY and Link layers
Interpret technical specifications and develop robust, low-level C code in RTOS environments
Collaborate effectively with cross-functional teams and external partners to deliver weekly firmware releases and feature demonstrations
Strong debugging skills and ability to triage and resolve issues in complex embedded systems
Familiarity with server I/O and memory workflows, performance tuning for latency and bandwidth optimization is a plus
Experience with pre-silicon validation in emulation environments is desirable

Our take

Astera Labs was founded in 2017 to help companies ease bottlenecks in computing-intensive tasks. This is a problem that has become increasingly urgent with the rapid development of AI technology, and constitutes what Astera Labs has described as an addressable market that reached $8 billion in 2025.

Astera Labs has had a particularly quick start as the pace of digital transformation has continued to accelerate amongst companies, enabling it to grow despite an economic slowdown. On top of this, its fabless approach facilitates faster scaling, helping to position the company as a market-leading connectivity provider.

With this remarkable growth and significant funding at its back, the company has cultivated a strong reputation and a range of products that tightly address pressing market issues. Lately, it has focused on growing its products and operations, particularly in North America and Asia, as well as expanding into Canada and achieving an IPO in 2024.

Freddie

Company Specialist at Welcome to the Jungle

Insights

Top investors

46% employee growth in 12 months

Glassdoor (4.5)

Company

Funding (last 2 of 3 rounds)

Nov 2022

$150m

SERIES D

Sep 2021

$50m

SERIES C

Total funding: $206.4m

Company benefits

Flexible time off in the US
Parental leave
Competitive medical, dental and vision plans
401K
Retirement and pension plans

Company HQ

Santa Clara, CA

Leadership

Jitendra Mohan

(CEO)

After graduating with a Master's in Electrical Engineering from Stanford, they were Design Director at the National Semiconductor Corporation.

Casey Morrison

(Co-Founder & CPO)

Previously Systems Engineering Manager, Member of Group Technical Staff at Texas Instruments.

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