RTL Engineer, Tenstorrent
CPU Load/Store Unit (LSU)
$100-500k
OTE
Building computers for AI
Open for applications
Building computers for AI
501-1000 employees
Open for applications
$100-500k
OTE
501-1000 employees
Company mission
To bring unique solutions to the problems facing AI and machine learning.
Role
Who you are
- BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of industry experience
- Strong background and experience with high performance OOO CPU microarchitecture
- Experience working on an x86, ARM or RISC-V based CPU
- Architectural understanding of the load/store engines, memory consistency, MMU, Interface protocols for an Out of Order CPU
- Expertise in logic design and ability to evaluate functional, performance, timing and power for you design
- Strong experience with hardware description languages (Verilog, VHDL), simulators (VCS, NC, Verilator), Synthesis and Power tools
- Expertise in microarchitecture definition and specification development
- Strong problem solving and debug skills across various levels of design hierarchies
What the job involves
- CPU Microarchitecture/RTL engineer focusing on high-performance CPUs. The person coming into this role will work with a highly experienced team and deliver a functional, performant, timing and power converged block
- RTL design and Microarchitecture of the Load/Store unit for a from-scratch high performance CPU based on RISC-V ISA, working closely with the DV and PD team
- RTL coding in Verilog leveraging on both industry tools as well as open-source infrastructure
- Work with design, test and post silicon validation teams for high quality delivery
- Drive trade-offs for your logic by working closely with performance, DV and physical design engineers to craft optimal solutions that meet the design goals
- Deploy innovative techniques for improving power, performance and area of the design, drive experiments with RTL and evaluate synthesis, timing and power results
- Debug RTL/logic issues across various hierarchies (core, chip) in both pre-silicon and post-silicon environment
- Enhance RTL design environment, tools and infrastructure
Our take
Advances in artificial intelligence apps, combined with a global chip shortage, are strong tailwinds for chip processor Tenstorrent. The semi-conducter developer is designing specialized chips for running artificial intelligence applications, building chips for what it calls "software 2.0".
The company’s unique approach is to build for this future software, which it believes will be written at a higher level. Combining this with conditional computing, Tenstorrent supports a scalable distributed network approach that is analogous to a human brain.
While the market for specialised AI hardware is destined to be gigantic, the company has to compete with a plethora of hopeful startups (as well as major tech companies like NVIDIA and Qualcomm). That said, Tenstorrent boasts an excellent trajectory so far, with its latest moves including unveiling its high-end Wormhole AI processors, and a partnership with LG which will see the development of chips for "Affectionate Intelligence".
Kirsty
Company Specialist at Welcome to the Jungle
Insights
52% employee growth in 12 months
Company
Funding (last 2 of 7 rounds)
Dec 2024
$700m
SERIES D
Jun 2024
$300m
LATE VC
Total funding: $1.3bn
Company HQ
Flemingdon Park, Toronto, ON
Leadership
Jim Keller
(CEO)Previously Senior VP of Silicon Engineering at Intel Corporation, VP of Autopilot Hardware Engineering at Tesla, Corporate VP and Chief Architect at AMD, and VP of Engineering at Apple.
Milos Trajkovic
(Co-Founder & Director of Hardware Engineering)Former Manager of Firmware Design Engineering at AMD, and FPGA design engineer at Signum Concepts.
Ivan Hamer
(Co-Founder)Former Consulting Software/Embedded Engineer at AMD, and Senior Software Developer at iNTERFACEWARE.
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