Principal Design Verification Engineer, Fabric Cryptography

Contract

Salary not provided

Python

C++

Expert level

Austin

Boston

Chicago

Los Angeles

New York

San Francisco Bay Area

Remote from US

Hardware & software for advanced cryptography

Job no longer available

Hardware & software for advanced cryptography

21-100 employees

B2BArtificial IntelligenceSecurityManufacturingWeb 3.0

Job no longer available

Salary not provided

Python

C++

Expert level

Austin

Boston

Chicago

Los Angeles

New York

San Francisco Bay Area

Remote from US

21-100 employees

B2BArtificial IntelligenceSecurityManufacturingWeb 3.0

Company mission

To unlock the next generation of cryptography.

Job

Company

Role

Who you are

BS, MS, PhD in Electrical Engineering, Computer Science, or a related field
10+ years of strong experience with design verification
Integration of third-party IP into an SoC
Experience with an SoC through tapeout and post-silicon
Knowledge of CDC, XProp,and DFT
UVM testbench development from scratch, SystemC/C++ experience a plus
Python knowledge and scripting/automating DV flows
Good understanding of digital design, including RTL design, UVM, System Verilog and synthesis
Knowledge of cryptography and data protection is a plus
Excellent written and verbal communication skills, and the ability to work effectively in a team environment.  Ability to work independently, under pressure and in a startup setting

What the job involves

As a Design Verification Engineer, you will be an integral part of our mission to deliver cutting-edge cryptography processors
You will work alongside a team of highly skilled professionals who are committed to pushing the boundaries of hardware innovation
Your role will involve ensuring that our cryptographic processor designs meet the highest standards of functionality, performance, and reliability
Work on verification of a proprietary cryptographic processor and SoC
Contribute to the architecture and methodology of our DV environment and team from scratch
Develop and execute verification plans and testbenches to validate the functionality of our products
Write and maintain directed and constrained random tests to ensure that the verification environment is up-to-date and effective
Work cross functionally to integrate the verification environment into the overall design flow
Own and develop formal and UVM verification methods to ensure the completeness and consistency of the design
Provide technical guidance to other team members with the latest verification best practices and techniques

Our take

The rise of advanced cryptographic needs in sectors like finance, AI and blockchain has created a demand for more efficient and secure processing solutions. However, traditional CPUs and GPUs struggle with the complexity and speed required for these operations.

Fabric Cryptography is addressing this problem by developing a Verifiable Processing Unit (VPU), a custom silicon chip designed to enhance the efficiency, speed and cost-effectiveness of cryptographic workloads. Its technology supports critical algorithms like Zero-Knowledge Proofs and Fully-Homomorphic Encryption, essential for securing data privacy and enabling trust.

With recent funding secured, Fabric Cryptography is ready to scale VPU production, expand its cryptography teams and develop software to make its technology more accessible. As the company aims to become a key player in transforming privacy and trust in digital interactions, the future looks promising for Fabric Cryptography.

Steph

Company Specialist at Welcome to the Jungle

Company

Funding (2 rounds)

Aug 2024

$33m

SERIES A

Jul 2023

$6m

SEED

Total funding: $39m

Company HQ

SoMa, San Francisco, CA

Leadership

Michael Gao

(Co-Founder & CEO)

Previously the co-founder and CSO of Luminous Computing, a photonic AI hardware startup. Before this, they were the co-founder and CEO of AlphaSheets.

Sagar Reddy

(Co-Founder)

They have served as the CTO of DXCorr Design since 2012. Previously they were an Implementation Tech Lead at MIPS, a Senior Staff Engineer at Sun Microsystems and a Design Engineer at AMD and SGI.

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