ML Compiler Software Engineering Technical Lead, d-Matrix
$196-300k
+ Equity + Bonus
3 days a week in office (Santa Clara, CA)
AI computing and efficiency software
Open for applications
AI computing and efficiency software
21-100 employees
Open for applications
$196-300k
+ Equity + Bonus
3 days a week in office (Santa Clara, CA)
21-100 employees
Company mission
To deliver best-in-class economics for AI inference acceleration in the datacenter.
Role
Who you are
- As such, we are seeking an AI compiler expert with experience in the TVM, Glow or preferably, the MLIR project
- Also important is familiarity with the LLVM project
- Experience mapping graph operations to many-core processors (or spatial fabrics) would be desirable
- BS / MS Preferred in Computer Science or equivalent with 12+ years in ML Compiler
- Experience establishing, growing and/or developing engineering teams (and software teams in particular)
- Experience with leading agile development methods is preferable including coordinating scrums, managing sprints and project task tracking with Kanban boards or similar
- Experience running code reviews, bug tracking meetings, familiarity and experience with CI/CD flows
- Managing interdependencies with other teams in order to meet milestones and target levels of performance
- Excellent documentation and presentation skills
What the job involves
- The Compiler Technical Lead role is driving the design and implementation of the MLIR-based compiler framework
- In this role, you will be overseeing the development of the compiler that partitions and maps large-scale NLP models to our scalable, multi-chiplet, parallel processing architecture with hundreds of digital in-memory tensor processors, vector processors, data shaping processors and both on-chip and off-chip memory
- The compiler will also coordinate the scheduling of parallel tasks onto the processors, data movements and inter processor synchronization
- The many-pass compiler architecture requires graph optimization passes, constant folding, data reshaping, padding, tiling and various other backend-specific operations
- The software will support a split offline/online mapping process with just-in-time mapping to chiplets, processors and DDR memory channels
- This role requires collaborating with the HW and SW architecture team, the Pytorch front-end pre-processing team, the data science numerics team, AI kernel team, SW test group, the benchmark group and the teams developing the various simulator and emulation platforms
- It is central to the overall efficiency of the solution
- This role includes technical leadership aspects: specifically the motivation, engagement, goal setting, performance tracking, objective setting and performance management
- This role does NOT require hardware design or verification experience
- That said, an understanding of the trade-offs made by processor architects when implementing accelerators for DNNs, DCNNs, transformer models and attention mechanisms is useful - especially when it comes to mapping very large NLP models to such architectures
Our take
The explosion in the field of AI puts significant strain on traditional computers, and the silicon architectures currently in use are a bottleneck on the speed and effectiveness of emerging AI models. d-Matrix aims to tackle this challenge by with its digital in-memory computing accelerator for AI. Using a combination of machine learning software tools and modular chiplets it delivers a huge increase in AI computing efficiency without a corresponding increase in energy use.
D-Matrix has major competitors in the race to deliver the next generation of scalable AI solutions. These include the likes of Nvidea which is developing GPU architecture that runs at ten times the efficiency of existing models. However the flexibility and easy scalability of d-Matrix's solution helps it stand out, and its novel approach has gained a high degree of support from investors. The company is currently expanding its operations in the US, India and Australia, and is well poised for success as demand for AI compute solutions continues to grow exponentially.
Freddie
Company Specialist at Welcome to the Jungle
Company
Funding (2 rounds)
Sep 2023
$110m
SERIES B
Apr 2022
$44m
SERIES A
Total funding: $154m
Company HQ
Santa Clara, CA
Leadership
Sid Sheth
(CEO)Previously Director at NetLogic Microsystems, Director of Marketing at Broadcom Inc and SVP/GM atInphi Corporation.
Sudeep Bhoja
(CTO)Previously CTO at Inphi Corporation, Technical Director at Broadcom and Chief Architect at Big Bear Networks.
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