Senior Digital Design Engineer, Riverlane
£70-90k
+ Bonus + Equity
Error correction for quantum computing
Job no longer available
Error correction for quantum computing
101-200 employees
Job no longer available
£70-90k
+ Bonus + Equity
101-200 employees
Company mission
To make quantum computing useful sooner.
Role
Who you are
- Don’t have a background in quantum computing? Not a problem! This cutting-edge technology requires a wide range of skills and disciplines, including classical computing skills. You will learn quantum computing along the way
- Experience with state-of-the-art FPGA platforms (e.g. AMD/Xilinx MPSoCs/RFSoCs, Altera Stratix 7 or Stratix 10)
- Experience with ASIC environments (<48nm)
- Proven professional experience in at least one of the following areas:
- Implementation of modern classical decoders on FPGA/ASIC e.g. LDPC, turbo-codes
- Architecture of System on Chip solutions, with at least one CPU and custom accelerators
- Large-scale, complex systems on FPGA/ASIC
- Proven capability to test, debug and improve complex systems
- Ability to convert product requirements into technical specifications to document and share your work
- A curious nature and a passion for learning and continuous improvement
- Excellent communication skills, with the ability to work both independently and collaboratively as part of a team
- You may be a great fit, even if you don’t meet every single qualification. We’d love to hear from you
What the job involves
- We have a fantastic opportunity for an experienced Digital Design Engineer to join us as we build the world’s first quantum error correction (QEC) stack
- As a senior-level Digital Design Engineer at Riverlane, you will help develop a multi-FPGA, low-latency, high throughput system that needs to perform complex operations, in a predictable and guaranteed way. You will use your knowledge and expertise to support more junior engineers, interact with software and identify novel solutions to our challenging problems
- This is a fantastic opportunity to join Riverlane’s Decode team, that is developing the world’s most advanced decoding algorithms. These algorithms are the beating heart of Deltaflow and are also used for cutting-edge research. The team is a mix of mathematicians, physicists and engineers, working together on a range of exciting and cutting-edge projects
- Our mission is exciting, but complex. It requires teams with a wide range of skills and perspectives, that communicate well and collaborate effectively to achieve truly innovative solutions
- You will thrive in an environment where knowledge sharing and continuous learning are the norm. We are moving fast in a brand new market, where requirements can change quickly as the technology evolves, so the ability to adapt is critical
- As a Senior/Staff Digital Design Engineer at Riverlane, you will work on one of these key areas:
- Implementation of QEC decoders on hardware
- Performance and area optimisation of our RTL
- In performing the above, you will (often from scratch) design or integrate complex IPs and develop tests, collaborating closely with our Software, Verification and Testing experts to deliver an outstanding product
Application process
- We will also consider part-time applications for this role. Please indicate your preferred working schedule in your cover letter
- Please upload a CV and covering letter by clicking 'Apply Now'. Your covering letter should explain why you are applying for the job and what skills and experience you can bring to the role
- We review CVs as we receive them and interview as soon as we have applications that look like a good match. We do not use closing dates. So, please apply as soon as possible to avoid missing out on this role
Our take
Whilst quantum computing is known for its precision, the machines used are small and prone to errors. Quantum error correction is the term given to the use of algorithms to fix errors in quantum computing, which Riverlane delivers through its quantum error correction software called Dataflow.
Dataflow was built by what Riverlane describes as the "world’s largest dedicated quantum error correction team". The product consists of proprietary QEC chips, hardware and software that work together to correct billions of errors every second. This will help to deliver a vast improvement upon modern quantum computers which can only perform a few hundred quantum operations before an error occurs.
Riverlane has enjoyed substantial funding which will allow the company to set out on its long-term road map. With such comprehensive expertise and a product that will aid companies and researchers for years to come, Riverlane will no doubt play an integral part of the future of quantum computing.
Kirsty
Company Specialist at Welcome to the Jungle
Insights
Company
Funding (last 2 of 8 rounds)
Aug 2024
$79.8m
SERIES C
May 2024
$2.9m
GRANT
Total funding: $134.8m
Company benefits
- A comprehensive benefits package that includes private medical insurance, life insurance and a contributory pension scheme
- Equity so that our team can share in the long-term success of Riverlane
- 28 days annual leave plus bank holidays and enhanced family leave
Company HQ
Central Cambridge, Cambridge, UK
Leadership
Steve Brierley
(CEO)Previously a Senior Research Fellow at the University of Cambridge and the Heilbronn Institute for Mathematical Research.
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