Senior Staff Engineer, Tenstorrent
SOC Top/Debug Implementation
$100-500k
Salary including base and variable compensation targets
Building computers for AI
Open for applications
Building computers for AI
501-1000 employees
Open for applications
$100-500k
Salary including base and variable compensation targets
501-1000 employees
Company mission
To bring unique solutions to the problems facing AI and machine learning.
Role
Who you are
- BS/MS/PhD in EE/ECE/CE/CS or a related field with 5+ years of experience in SOC design and implementation, focusing on debug architecture
- Proven experience in SOC debug architecture design, including defining and implementing top-level debug and trace solutions for complex SOCs
- Strong knowledge of JTAG, trace modules, and debug controllers and experience working with industry-standard debug and test protocols
- Experience working across multiple chiplets in a large-scale SOC, with a focus on implementing debug solutions that span multiple subsystems
- Deep understanding of hardware design, verification, and post-silicon validation processes, with experience troubleshooting complex SOC designs in a lab environment
- Familiarity with RTL design using Verilog/VHDL and working knowledge of simulation tools such as VCS, NC-Sim, and Verilator
- Excellent problem-solving and debugging skills, with experience working across multiple design hierarchies and subsystems
- Strong interpersonal and communication skills, with the ability to collaborate effectively across cross-functional teams
- Experience with AI or high-performance computing SOCs is a plus
What the job involves
- We are looking for a SOC Top/Debug Implementation Engineer who will take ownership of the debug solution and design across all chiplets in our high-performance AI SOC. This role involves working closely with cross-functional teams to implement and optimize top-level debug strategies that ensure seamless operation and post-silicon validation of the SOC
- Own and drive the debug solution and architecture across all chiplets within the SOC, from initial concept through to post-silicon bring-up and validation
- Define and implement top-level debug and trace architectures for high-performance SOCs, ensuring comprehensive visibility into SOC behavior and performance
- Work closely with cross-functional teams to define requirements for system-level debug features, including software and hardware integration
- Develop and implement debug interfaces, including JTAG, trace modules, and debug controllers, that enable detailed analysis and troubleshooting of SOC subsystems
- Collaborate with the design, verification, and post-silicon teams to ensure debug features are properly integrated and validated across all stages of development
- Optimize the debug infrastructure to minimize overhead and maximize performance while ensuring complete observability across the SOC
- Assist in post-silicon debug efforts, working closely with lab teams to bring up SOC designs and identify any system-level issues during validation
- Drive innovation in debug methodologies, ensuring that debug solutions are scalable, reusable, and robust across multiple product lines and generations of SOCs
- Support silicon bring-up, post-silicon validation, and manufacturing test efforts with debugging insights and solutions
Our take
Advances in artificial intelligence apps, combined with a global chip shortage, are strong tailwinds for chip processor Tenstorrent. The semi-conducter developer is designing specialized chips for running artificial intelligence applications, building chips for what it calls "software 2.0".
The company’s unique approach is to build for this future software, which it believes will be written at a higher level. Combining this with conditional computing, Tenstorrent supports a scalable distributed network approach that is analogous to a human brain.
While the market for specialised AI hardware is destined to be gigantic, the company has to compete with a plethora of hopeful startups (as well as major tech companies like NVIDIA and Qualcomm). That said, Tenstorrent boasts an excellent trajectory so far, with its latest moves including unveiling its high-end Wormhole AI processors, and a partnership with LG which will see the development of chips for "Affectionate Intelligence".
Kirsty
Company Specialist at Welcome to the Jungle
Insights
Company
Funding (last 2 of 7 rounds)
Dec 2024
$700m
LATE VC
Jun 2024
$300m
LATE VC
Total funding: $1.3bn
Company values
- Collaboration
- Curiosity
- Commitment to Solving Hard Problems
Company HQ
Flemingdon Park, Toronto, ON
Articles
Leadership
Jim Keller
(CEO)Previously Senior VP of Silicon Engineering at Intel Corporation, VP of Autopilot Hardware Engineering at Tesla, Corporate VP and Chief Architect at AMD, and VP of Engineering at Apple.
Milos Trajkovic
(Co-Founder & Director of Hardware Engineering)Former Manager of Firmware Design Engineering at AMD, and FPGA design engineer at Signum Concepts.
Ivan Hamer
(Co-Founder)Former Consulting Software/Embedded Engineer at AMD, and Senior Software Developer at iNTERFACEWARE.
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