Senior ASIC Design Engineer, Amazon

• 7+ years of non-internship professional software development experience
• 7+ years of programming with at least one software programming language experience
• 7+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience
• Experience as a mentor, tech lead or leading an engineering team
• 7+ years of digital design experience, preferably in SoC design and implementation

Desirable

• Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing
• Analyze simulation results, identify and debug logic errors, and propose solutions
• Work closely with design and verification engineers to validate fixes and ensure design closure
• Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers
• Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation
• Be part of Project Kuiper’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways
• The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies
• Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets
• Define, configure and integration SoC Subsystems
• Contribute to the SoC floor planning effort
• Define and develop any necessary support logic
• Configure, instantiate and integrate 3rd party IP blocks
• Understand low power design & the impact of DFT on the blocks
• Perform initial synthesis & timing analysis
• Assist verification team in unit verification including test plan development
• Assist with debug and bring-up