SOC Emulation Engineer, Tenstorrent

Hardware Emulation Infrastructure

$100-500k

OTE

Salary shown includes base and variable compensation targets. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Python

C++

CMake

ChatGPT

Junior and Mid level

Austin

San Francisco Bay Area

Next-generation computing company building computers for AI

Open for applications

Next-generation computing company building computers for AI

1001+ employees

B2BArtificial IntelligenceEnterpriseManufacturingDeep TechMachine Learning

Open for applications

$100-500k

OTE

Python

C++

CMake

ChatGPT

Junior and Mid level

Austin

San Francisco Bay Area

1001+ employees

B2BArtificial IntelligenceEnterpriseManufacturingDeep TechMachine Learning

Company mission

To bring unique solutions to the problems facing AI and machine learning.

Job

Company

Role

Who you are

Background in Electrical/Computer Engineering or Computer Science with 1-3 years of experience in chip design, verification, or emulation
Proficient in Python for automation and test development, with a working knowledge of C++ and the ability to navigate SystemVerilog RTL
Skilled at using modern AI tools (Claude, ChatGPT, Copilot) to accelerate code generation, debugging, and documentation analysis
Energetic about supporting diverse teams, from high-level software to low-level firmware, to solve complex runtime and build issues
Ability to integrate vendor and custom transactors into RTL testbenches while handling clock domain and tri-state resolution
Experience building Python APIs (using pybind11) and maintaining CMake-based compilation flows for emulation libraries
Solid understanding of standard chip interfaces, bus protocols, and hardware synchronization (resets/clocking)
A commitment to triaging and debugging the full stack, spanning from Python tests and C++ bindings down to hardware

What the job involves

We are seeking a junior-to-mid level SOC Emulation Engineer to support our hardware emulation infrastructure and internal chip design teams
This role focuses on integrating vendor and custom hardware transactors, developing Python-based test frameworks, and providing technical support to emulation users across multiple chip projects
Deepening your expertise with world-class platforms like Synopsys Zebu for massive-scale silicon validation
Gaining a holistic view of chip development by bridging the gap between hardware RTL and software drivers
Building and optimizing large-scale emulation build and run tooling for high-performance engineering teams
Refining your ability to gather requirements and facilitate communication between hardware designers and software engineers

Our take

Tenstorrent is a US- and Canada-based semiconductor startup specializing in processors for AI workloads. Rather than building gneral-purpose CPUs or GPus, the company develops custom chips and sofrware optimized for running moder AI models. As demand for AI accelerates, and as a global chip shortage reshapes the semiconductor industry, these trends have become strong tailwinds for Tenstorrent.

The company’s unique approach is to build for this future software, which it believes will be written at a higher level. Combining this with conditional computing, Tenstorrent supports a scalable distributed network approach that is analogous to a human brain.

While the market for specialized AI hardware is destined to be gigantic, the company has to compete with a plethora of hopeful startups (as well as major tech companies like NVIDIA and Qualcomm). That said, Tenstorrent boasts an excellent trajectory so far, with its latest moves including unveiling its high-end Wormhole AI processors, and a partnership with LG which will see the development of chips for "Affectionate Intelligence".

Kirsty

Company Specialist at Welcome to the Jungle

Insights

Top investors

52% employee growth in 12 months

Glassdoor (4.5)

Company

Funding (last 2 of 7 rounds)

Dec 2024

$693m

SERIES D

Jun 2024

$300m

LATE VC

Total funding: $1.3bn

Company HQ

Flemingdon Park, Toronto, ON

Leadership

Jim Keller

(CEO)

Previously Senior VP of Silicon Engineering at Intel Corporation, VP of Autopilot Hardware Engineering at Tesla, Corporate VP and Chief Architect at AMD, and VP of Engineering at Apple.

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