Technical Chief of Staff for ASIC Engineering, Astera Labs
$216-300k
Office located in San Jose, CA
Purpose-built connectivity solutions
Open for applications
Purpose-built connectivity solutions
501-1000 employees
Open for applications
$216-300k
Office located in San Jose, CA
501-1000 employees
Company mission
To be a trusted partner for distributing data in intelligent systems.
Role
Who you are
- 10+ years in semiconductor/SoC/ASIC or adjacent high-complexity engineering environment (e.g., CPU/IP/System companies)
- Proven success in Chief of Staff, Staff Program Manager, TPM Director, or similar technical leadership-enablement role
- Strong technical acumen — able to understand engineering trade-offs and make decisions with limited information, challenge assumptions, and earn credibility with senior ICs
- Demonstrated experience running program cadence for complex silicon programs (tapeout, IP integration, etc.)
- Proven ability to organize complex workflows and drive consistent follow-through
- High EQ and organizational awareness; can navigate tension and align diverse viewpoints
- Exceptional written/verbal communication, structured thinking, and execution discipline
- Prior experience in leading RTL2GDSII chip design is a huge plus
- We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities
What the job involves
- We are seeking a technically strong Chief of Staff to the Head of Engineering who will also lead Engineering Program Management across Silicon Engineering
- This role is a force-multiplier for Engineering leadership — driving org scale, decision velocity, and execution rigor
- The ideal candidate brings deep technical fluency, structured problem-solving, and the ability to drive outcomes through influence rather than hierarchy
- The role is fully in person in San Jose
- Drive operational cadence: engineering all hands, staff meetings, agenda/material prep, tech talks, university engagements, action follow-through, and leadership syncs
- Frame and resolve high-leverage decisions — proactively surface blockers (technical, operational, organizational) before they escalate
- Manage escalations and organizational friction — diagnose root causes, coordinate resolution paths, and ensure durable fixes
- Partner cross-functionally with Hardware, Product, and Quality teams to ensure clarity of communication, alignment on priorities, and disciplined follow-through on decisions
- Support org design, headcount planning, and hiring prioritization for engineering teams
- Maintain alignment across functions through clear messaging and communication, validate exitance and validation of processes
- Navigate org dynamics, build trust, and constructively challenge assumptions; maintain psychological safety
- Support the head of engineering with administrative and org related activities
- Status management — collect and track status across functions contributing to ASIC tapeouts
- Milestone tracking — maintain methodology checklists and boundary agreements to ensure schedule adherence
- IP and vendor tracking — own visibility into IP deliveries, version inventory, vendor issues, and escalation loops
- Quality & documentation — monitor quality KPIs, ensure engineering documentation completeness
- Requirements tracking — ensure PRDs/features are captured, tracked, baselined
- Resource monitoring — track compute, hardware, storage consumption and thresholds
- Internal reporting — generate status reporting for Silicon Engineering leadership
- Drive cross-engineering outcomes through credibility, clarity, and follow-through — not hierarchy
- Create order in ambiguous spaces; shape scope where it is undefined
- What Success Looks Like
- Engineering leadership spends more time on strategic and technical decisions, less on coordination
- Milestones hit with fewer escalations and clearer accountability
- Status, risks, and decisions are crisp — never ad hoc or late
- Teams feel supported, not policed — trust increases, friction decreases without compromising on accountability
- Ambiguity decreases over time as clarity and execution rhythm scale with the org
Our take
Astera Labs was founded in 2017 to help companies ease bottlenecks in computing-intensive tasks. This is a problem that has become increasingly urgent with the rapid development of AI technology, and constitutes what Astera Labs has described as an addressable market that reached $8 billion in 2025.
Astera Labs has had a particularly quick start as the pace of digital transformation has continued to accelerate amongst companies, enabling it to grow despite an economic slowdown. On top of this, its fabless approach facilitates faster scaling, helping to position the company as a market-leading connectivity provider.
With this remarkable growth and significant funding at its back, the company has cultivated a strong reputation and a range of products that tightly address pressing market issues. Lately, it has focused on growing its products and operations, particularly in North America and Asia, as well as expanding into Canada and achieving an IPO in 2024.
Freddie
Company Specialist at Welcome to the Jungle
Insights
46% employee growth in 12 months
Company
Funding (last 2 of 3 rounds)
Nov 2022
$150m
SERIES D
Sep 2021
$50m
SERIES C
Total funding: $206.4m
Company benefits
- Flexible time off in the US
- Parental leave
- Competitive medical, dental and vision plans
- 401K
- Retirement and pension plans
Company HQ
Santa Clara, CA
Leadership
Jitendra Mohan
(CEO)After graduating with a Master's in Electrical Engineering from Stanford, they were Design Director at the National Semiconductor Corporation.
Casey Morrison
(Co-Founder & CPO)Previously Systems Engineering Manager, Member of Group Technical Staff at Texas Instruments.
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