Senior Firmware Engineer, Astera Labs

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (Master’s preferred)
• Strong fundamentals in embedded systems, computer architecture, and low-level software
• Proven experience developing firmware for complex SoC or silicon-based products in Server, Storage, Networking, or Accelerator environments
• Proficiency in C (required); C++ experience is a plus
• Ability to work cross-functionally in a fast-paced, highly technical environment
• Bare-metal or RTOS-based firmware development (e.g., ThreadX, MQX, or equivalent)
• Firmware development for on-chip microcontrollers and supporting SDKs
• Strong debugging skills across hardware, firmware, and system layers
• Familiarity with firmware build systems and tooling (gcc, Make, Git, Doxygen)
• Python scripting for automation, validation, or tooling
• Hands-on experience with server, storage, or networking systems

Desirable

• Astera Labs is seeking Firmware Engineers across multiple seniority levels to architect, develop, and deliver core firmware for our next-generation connectivity, chiplet, and system products. This is a catch-all requisition designed to hire exceptional firmware talent aligned to one or more critical technical domains across PCIe/CXL, Ethernet, UALink, UCIe/Chiplet, and Device Driver development
• Firmware is a core differentiator for Astera Labs’ products and is treated as a first-class engineering discipline, on par with hardware and silicon design. Engineers in this role will work closely with Architecture, RTL, Physical Design, Validation, and Systems teams, and may be customer-facing to support integration, debug, and deployment in hyperscale and data-center environments
• We are hiring Individual Contributors (Senior up to Senior Principal). This role is required onsite in San Jose, CA
• Architect, develop, and maintain bare-metal and low-level firmware running on embedded microcontrollers within Astera Labs SoCs and systems
• Design and implement device drivers, core firmware services, and hardware abstraction layers for high-speed connectivity products
• Define and implement HW-SW interfaces in close collaboration with RTL, PD, and Architecture teams
• Lead bring-up, debug, and validation of firmware on silicon and system platforms
• Develop and maintain C/C++ firmware codebases, SDKs, and supporting infrastructure
• Build automation, tooling, and diagnostics using Python and scripting frameworks
• Participate in system-level debug involving PCIe, Ethernet, memory subsystems, and interconnect fabrics
• Support customer enablement, integration, and escalations as needed