Machine Learning Engineer, Zendar

• The ideal candidate enjoys understanding both neural network architectures and the hardware on which they execute, and is interested in techniques such as hardware-aware neural architecture search, model scaling, quantization, mixed-precision inference, and model compression
• Strong understanding of machine learning and deep neural network architectures with hands-on experience developing machine learning models using frameworks such as PyTorch
• Proficiency programming in Python
• Experience analyzing the computational characteristics of neural networks and understanding how model architecture affects inference performance
• Familiarity with techniques such as model architecture search, model scaling, quantization, mixed-precision inference, knowledge distillation, or other model compression methods
• Experience with machine learning inference and deployment technologies such as ONNX, TensorRT, or similar frameworks
• Ability to reason across different layers of the ML deployment stack, from model architecture and computational graphs to inference runtimes and hardware execution
• Familiarity with professional software development practices and tools, including Git, unit testing, debugging, and profiling
• Strong communication skills and the ability to work effectively across machine learning research, embedded software, and product engineering teams
• Fluent in English and French, both written and spoken

Desirable

• We are seeking experienced ML engineers to optimize and deploy machine learning models on heterogeneous embedded computing platforms
• You will work at the intersection of machine learning, compilers, runtime systems, and computer architecture, helping bridge the gap between models developed by researchers and highly optimized implementations running on production hardware
• A major focus of this role is understanding the trade-offs between model quality and computational efficiency
• You will work closely with machine learning researchers to develop and evaluate hardware-aware model architectures, identify computational bottlenecks, and explore architectural changes that improve latency, throughput and memory usage while maintaining model quality
• It is an exciting opportunity to tackle real-world challenges in bringing algorithms developed in the lab to vehicles operating in diverse physical environments
• Profile and analyze machine learning models to identify computational, memory, and data-movement bottlenecks
• Explore trade-offs between model output quality and computational cost, including latency, throughput, and memory footprint
• Develop methodologies for hardware-aware model optimization and neural network architecture search, using real hardware measurements as optimization objectives. The target platform can include CPUs, GPUs, and dedicated AI accelerators
• Apply model optimization techniques such as quantization, mixed-precision inference, distillation, and other model compression techniques. Perform analysis on the numerical differences introduced by these optimization techniques
• Develop and maintain model export, benchmarking, and deployment pipelines across frameworks and inference runtimes such as PyTorch, ONNX, and TensorRT
• Evaluate different deployment strategies and determine how models should be mapped onto heterogeneous processing units such as CPUs, GPUs, and dedicated AI accelerators