Design Verification Engineer, Waymo

• 3+ years of experience with using UVM to verify ASICs
• Knowledge of SystemVerilog
• Experience with complex digital designs
• Advanced verification techniques like constrained random generation, functional coverage, and assertions

Desirable

• To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance
• We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms
• Work closely with the design team to define specifications and test plans
• Execute on test plans, including test development, reference model design, and failure debug. Verify key functionality and performance use cases
• Contribute to the development of overall verification infrastructure, tools, and methodology
• Identify and integrate third-party verification IP
• Collect and analyze coverage metrics
• Advocate and establish verification best-practices