Design Verification Engineer, Amazon

• Bachelor's degree in Electrical Engineering or a related field
• 2+ years of UVM, C, System C, and scripting experience
• 5+ years in verification preferably in communication systems

Desirable

• Be part of Amazon Leo’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways
• This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies
• Implement a state of the art verification environment for IP, subsystem and SOC to facilitate testing of the DUT against reference models
• Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program
• Understand and debug system level communication scenarios on pre silicon and post silicon environments
• Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, SystemC and DPI-C
• Develop a highly automated environment to triage regression fails and report issues to stake holders