Senior Digital Design Engineer, Eliyan
Performance improvement for chiplet-based systems
Open for applications
Performance improvement for chiplet-based systems
21-100 employees
Open for applications
21-100 employees
Company mission
To revolutionize chiplet connectivity technologies by challenging the status quo to unleash the ultimate performance of smart systems of the future.
Role
Who you are
- Bachelors or Masters or Ph.D in Electrical Engineering and related fields, or equivalent
- 8+ years of experience in high-speed digital design (preferably in retimer, gearbox, Ethernet PMA/PCS logic)
- Strong expertise in RTL and Assertion coding with SystemVerilog
- Proficiency in taking RTL through synthesis and produce a PPA optimized frontend netlist
- Knowledge of Ethernet 802.3 standards’ clauses related to 100G/200G/400G/800G, Auto-Negotiation and Link Training
- Strong bias for innovations across all aspects of digital design including automation of mundane activities and methods for quality improvement
- Experience integrating 3rd party mixed signal IPs
- Proven track record of being part of a start-up like environment
- Expertise in Forward Error Correction (FEC) code implementation and performance analysis
- Knowledge of DRAM Controllers/PHYs and HBM Memory a plus
What the job involves
- As an Eliyan senior digital designer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility
- You will be developing micro-architecture specifications and RTL design descriptions for best-in-class PHYs and Controllers
- You will work with a cross-functional team of experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products
- Design, develop and/or integrate Ethernet PCS/PMA IPs for various data rates (100/200/400/800G)
- Develop micro-architecture specifications and implement digital designs using SystemVerilog
- Ensure compliance with Ethernet standards (IEEE 802.3)
- Optimize designs for power, area, and performance
- Collaborate with verification engineers for IP verification
- Work closely with physical design team for physical implementation
- Participate in design reviews and ensure design quality
- Develop and maintain all IP design collaterals that include documentation, RTL, SDC constraints, power intent definition (UPF/CPF), LINT/CDC rule files and waivers
- Stay up to date with industry trends, emerging technologies and progress in standards’ bodies
Our take
In order for technology like artificial intelligence to work at its peak, the hardware we use needs to support high performance. Eliyan is working to make peak-performance hardware a reality by eliminating the so-called "memory wall" that hinders high-performance applications.
Essentially, this problem exists because the current memory infrastructure works slower than the high-performance applications themselves. Eliyan combats this by supplying chiplet interconnect technology, which enables the tiny building blocks of computing structure to be linked together on the same device. This eliminates the "memory wall" and allows for a 10X improvement in performance.
It's a complex undertaking, but a valuable one - and the idea has seen Eliyan raise considerable backing. It will use these funds to address challenges in the design and manufacturing of advanced AI chips, supercharging their performance through its chiplet interconnect technology.
Freddie
Company Specialist at Welcome to the Jungle
Company
Funding (2 rounds)
Mar 2024
$60m
SERIES B
Nov 2022
$40m
SERIES A
Total funding: $100m
Company HQ
Santa Clara, CA
Leadership
Ramin Farjadrad
(Co-Founder & CEO)Former CTO and VP of Networking/Automotive PHYs at Marvell Semiconductor. Was Chair of the Technical Committee at NAV Alliance, Co-Founder and CTO at Aquantia and Senior Principal at Rambus.
Syrus Ziai
(Co-Founder & VP of Engineering)Previously VP of Engineering at NUVIA and Qualcomm, SVP of Engineering at PsiQuantum and VP of Worldwide Engineering at Ikanos Communications. Has also held CEO positions in the past.
Patrick Soheili
(Co-Founder)Managing Director at Ridgeview Venture Partners. Was a VP at eSilicon, as well as President and CEO at ON DEMAND Microelectronics and at Cradle Technologies.
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